Tuesday, May 31, 2022
tinkercat simple pwm
transition from 50% to 75% duty cycle
void setup()
{
pinMode(9, OUTPUT);
}
void loop()
{
analogWrite(9,64);
delay(1000);
analogWrite(9,127);
delay(1000);
analogWrite(9,191);
delay(1000);
analogWrite(9,255);
delay(1000);
analogWrite(9,0);
delay(1000);
}
reference:
tinkercat timer interrupt measure pulse duration
press and release button, button hold duration is displayed
int period;
void setup()
{
pinMode(7, INPUT_PULLUP);
PCICR = 0b00000100; //enable pin change interrupt on group 3
PCMSK2 = 0b10000000; //enable pin change interrupt on pin 7
TCCR1A = 0b00000000; //TCCR1A bit 0, 1 and TCCR1B bit 3, 4 set timer mode
TCCR1B = 0b00000101; //Set mode to be normal. set scaler to be clock/1024
sei();
Serial.begin(9600);
}
ISR (PCINT2_vect){
if(digitalRead(7)){
period = TCNT1 *0.0000625*1024;
Serial.print("button press periord:");
Serial.println(period);
}
else{
TCNT1 = 0;
}
}
void loop()
{
}
reference:
Monday, May 30, 2022
Sunday, May 29, 2022
tinkercat timer interrupt clear on compare
flash led every second with timer interrupt
volatile byte lightState = LOW;
int period;
void setup()
{
pinMode(9, OUTPUT);
TCCR1A = 0b00000000; //TCCR1A bit 0, 1 and TCCR1B bit 3, 4 set timer mode
TCCR1B = 0b00001101; //Set mode to be clear on compare. set scaler to be clock/1024
OCR1A = 15624; //period = (OCR1A/B + 1)*scaler*62.5ns = 1s
TIMSK1 = 0b00000010; //enable timer counter
sei();
Serial.begin(9600);
}
ISR (TIMER1_COMPA_vect){
lightState = digitalRead(9);
digitalWrite(9, not lightState);
period = TCNT1 *0.0000625*1024;
Serial.print("timer periord:");
Serial.println(period);
}
void loop()
{
}
reference:
Saturday, May 28, 2022
tinkercat pin change interrupt
3 buttons to blink, turn on and off 2nd led, while 1st led flashes
int buttonState = 1;
volatile byte lightState = LOW;
void setup()
{
pinMode(5, INPUT);
pinMode(6, INPUT);
pinMode(7, INPUT);
pinMode(9, OUTPUT);
pinMode(10, OUTPUT);
PCICR |= B00000100; //enable PCMSK2 (group 2: PCINT16 to PCINT23)
PCMSK2 |= B11100000; //D5, D6 and D7 could trigger interrupt
}
ISR (PCINT2_vect){
if(digitalRead(5) ){
buttonState = 1;
}
if(digitalRead(6) ){
buttonState = 2;
}
if(digitalRead(7) ){
buttonState = 3;
}
}
void loop()
{
digitalWrite(10, HIGH);
delay(500);
interruptLed();
digitalWrite(10, LOW);
delay(500);
interruptLed();
}
void interruptLed(){
switch(buttonState){
case 1:
lightState = !lightState;
digitalWrite(9, lightState);
break;
case 2:
digitalWrite(9, HIGH);
break;
case 3:
digitalWrite(9, LOW);
break;
default:
buttonState = 1;
break;
}
}
reference:
PCICR
Friday, May 27, 2022
tinkercat hardware interrupt
when button is pushed, red led turns on right away
volatile byte buttonState = LOW;
void setup()
{
pinMode(7, OUTPUT);
pinMode(9, OUTPUT);
pinMode(2, INPUT);
attachInterrupt(digitalPinToInterrupt(2), lightOn, CHANGE);
}
void loop()
{
digitalWrite(9, HIGH);
delay(2000);
digitalWrite(9, LOW);
delay(2000);
}
void lightOn(){
buttonState = digitalRead(2);
digitalWrite(7, buttonState);
}
reference:
Thursday, May 26, 2022
Monday, May 23, 2022
kamloops trip
expense
May 16 - plane ticket, HDMI cable, uber
May 17 - hotel
May 18 - gas
May 19 - hotel
May 23 - hotel, fuel
May 24 - fuel(p)
May 25 - hotel, gas, fuel(p)
timesheet
May 16 - Fly to Kamloops - 4h
May 17 - survey - 12h
May 18 - weather - 8h
May 19 - weather - 8h
May 23 - fly back kamloops - 8h
May 24 - survey - 12h
May 25 - fly back Calgary - 8h
Friday, May 20, 2022
vanderhoof trip
expense
May 20 - gas, fuel (p), hotel
May 21 - fuel
May 22 - fuel
timesheet
May 20 - relocate to vanderhoof, survey - 8h
May 21 - survey - 12h
May 22 - survey - 8h
Thursday, May 19, 2022
Monday, May 16, 2022
Sunday, May 15, 2022
vivado vitis ide
import pynq-z1 to vivado, create new project
add processor, leds, buttons
auto connect, rename leds (rgb), buttons (btns)
create HDL wrapper
add constraints file, check copy constraints file to project
##Buttons
set_property -dict { PACKAGE_PIN D19 IOSTANDARD LVCMOS33 } [get_ports { btns[0] }]; #IO_L4P_T0_35 Sch=btn[0]
set_property -dict { PACKAGE_PIN D20 IOSTANDARD LVCMOS33 } [get_ports { btns[1] }]; #IO_L4N_T0_35 Sch=btn[1]
set_property -dict { PACKAGE_PIN L20 IOSTANDARD LVCMOS33 } [get_ports { btns[2] }]; #IO_L9N_T1_DQS_AD3N_35 Sch=btn[2]
set_property -dict { PACKAGE_PIN L19 IOSTANDARD LVCMOS33 } [get_ports { btns[3] }]; #IO_L9P_T1_DQS_AD3P_35 Sch=btn[3]
##Switches
set_property -dict { PACKAGE_PIN M20 IOSTANDARD LVCMOS33 } [get_ports { sw[0] }]; #IO_L7N_T1_AD2N_35 Sch=sw[0]
set_property -dict { PACKAGE_PIN M19 IOSTANDARD LVCMOS33 } [get_ports { sw[1] }]; #IO_L7P_T1_AD2P_35 Sch=sw[1]
##RGB LEDs
set_property -dict { PACKAGE_PIN L15 IOSTANDARD LVCMOS33 } [get_ports { rgb[0] }]; #IO_L22N_T3_AD7N_35 Sch=led4_b
set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports { rgb[1] }]; #IO_L16P_T2_35 Sch=led4_g
set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 } [get_ports { rgb[2] }]; #IO_L21P_T3_DQS_AD14P_35 Sch=led4_r
set_property -dict { PACKAGE_PIN G14 IOSTANDARD LVCMOS33 } [get_ports { led[3] }]; #IO_0_35 Sch=led5_b
set_property -dict { PACKAGE_PIN L14 IOSTANDARD LVCMOS33 } [get_ports { led[4] }]; #IO_L22P_T3_AD7P_35 Sch=led5_g
set_property -dict { PACKAGE_PIN M15 IOSTANDARD LVCMOS33 } [get_ports { led[5] }]; #IO_L23N_T3_35 Sch=led5_r
generate bitstream, wait to finish
export hardware, include bitstream
tools -> launch vitis ide
create platform project
browse xsa file in project directory
right click -> build project
file -> new -> application project
select platform project -> next
name platform project -> next
select hello world
//hello world.c#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xparameters.h"
#include "xgpio.h"
#include "sleep.h"
#define R 0x04
#define G 0x02
#define B 0x03
XGpio gpio;
void driverInit() {
int status;
status = XGpio_Initialize(&gpio, XPAR_AXI_GPIO_0_DEVICE_ID);
if (status != XST_SUCCESS) {
print("Err: Gpio initalization failed\n\r");
} else {
print("Info: Gpio Initialization successful\n\r");
}
}
void configGpio() {
XGpio_SetDataDirection(&gpio, 1, 0);
XGpio_SetDataDirection(&gpio, 2, 1);
XGpio_DiscreteSet(&gpio, 1, 0);
}
void runProject() {
int button;
while (1) {
button = XGpio_DiscreteRead(&gpio, 2);
switch (button) {
case 1:
xil_printf("%d: ",button);
XGpio_DiscreteWrite(&gpio, 1, R);
print("\tRED\n\r");
break;
case 2:
xil_printf("%d: ",button);
XGpio_DiscreteWrite(&gpio, 1, G);
print("\tGREEN\n\r");
break;
case 4:
xil_printf("%d: ",button);
XGpio_DiscreteWrite(&gpio, 1, B);
print("\tBLUE\n\r");
break;
case 8:
xil_printf("%d: ", button);
print("\tRGB\n\r");
XGpio_DiscreteWrite(&gpio, 1, R);
sleep(1);
XGpio_DiscreteClear(&gpio, 1, R);
sleep(1);
XGpio_DiscreteWrite(&gpio, 1, G);
sleep(1);
XGpio_DiscreteClear(&gpio, 1, G);
sleep(1);
XGpio_DiscreteWrite(&gpio, 1, B);
sleep(1);
XGpio_DiscreteClear(&gpio, 1, B);
sleep(1);
break;
default:
XGpio_DiscreteClear(&gpio, 1, R);
XGpio_DiscreteClear(&gpio, 1, G);
XGpio_DiscreteClear(&gpio, 1, B);
break;
}
}
}
int main() {
init_platform();
print("Hello World\n\r");
driverInit();
configGpio();
runProject();
cleanup_platform();
return 0;
}
right click -> build project
window -> show view -> add terminal
click button in terminal -> select serial port
right click project -> run as -> hardware
reference:
import board files to vivado
pynq-z1 board file and constraints file
Saturday, May 14, 2022
Friday, May 13, 2022
vivado Zynq
create new project, select zynq board
create block design -> add zynq processor
add gpio, bram controller, memory generator
double click memory generator -> change type to dual port ram
connect ram controller to ram
run block automation
run connection automation -> change gpio to leds
click optimize routing
save block design, validate design
right click design source -> generate HDL wrapper
generate bit stream
export hardware design
reference:
Thursday, May 12, 2022
Tuesday, May 10, 2022
vivado clock IP
create new project, select board
project manager -> IP catalog -> search clock -> double click clocking wizard
set input clock
set output clock
summary
press generate
open clk_wiz_0.v
//create testbench file, copy input output pins
//testbench.v
`timescale 1ns / 1ps
module testbench;
wire clk_out1, clk_out2, clk_out3, locked;
reg reset, clk_in1;
clk_wiz_0 UUT(clk_out1, clk_out2, clk_out3, reset, locked, clk_in1);
initial begin
clk_in1 = 0;
#5 reset = 1;
#5 reset = 0;
end
always #5 clk_in1=~clk_in1; //100MZ
endmodule
zoom in after clocks are stable (locked=1)
clk_in 10ns 100MZ
clk_out_1 20ns 50MZ
clk_out_2 20ns 50MZ 75% duty cycle
clk_out_3 5ns 200MZ
reference:
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